- an Information Portal by Dr. Debashish Mohapatra
Title Published Date
Layout of Half Adder in L-Edit and Transient Analysis in T-Spice Wed, 14 Dec 2011
2-input NOR Gate in L-Edit and its Transient analysis in T-Spice Wed, 14 Dec 2011
2-input NAND gate in L-Edit and it's Spice Simulation Wed, 14 Dec 2011
Inverter in L-Edit and Spice Simulation Wed, 14 Dec 2011
PMOS Layout in L-edit Wed, 14 Dec 2011
NMOS using Ledt Wed, 14 Dec 2011